omiindustriiesCascading Register

omiindustriies Cascading Register

Drawing from a rich history of sequencing and pseudo-random voltage generators in synthesizers, the Cascading Register by omiindustriies is a highly flexible shift register that's sure to bring life to any patch. Building upon their first module, the Dual Digital Shift Register, this iteration features an 8-bit register, providing eight gate outputs. There's an internal oscillator to generate a clock signal, but it's possible to patch in an external timing source. Binary data can be fed into the register through the Seed button at the bottom of the module, or by using the Data input with any signal. When a "high" signal is detected on a clock pulse, the first stage ØØ goes active, and will be passed to the next stage each subsequent clock event.

The value of the Cascading Register should already be clear, but some further additions increase its flexibility even further. Internally, stages Ø4, Ø5, Ø7 are compared against each other with XOR logic, then compared to the Seed button and Data input separately before being fed back into the first stage. This linear feedback configuration allows for pseudo-random streams of gate sequences to be created, and by patching Ø3 back into the Data input, sequence lengths of 255 stages are possible.

Beyond simply being used as a source of gates, the Cascading Register also provides three stepped CV outputs, derived from the states of the first four, middle four, and last four stages respectively, and thus behaves as a sort of analog shift register offset by two stages. Two of those outputs provide attenuverters to scale and invert their signal, while the third only provides attenuation. Bring a new flavor of sequencing and clocking to your system with the Cascading Register by omiindustriies.

Cascading Register Features

• Eight-bit shift register and pseudo-random CV source
• Binary Data input and manual Seed button
• Eight gate outputs representing Data passed from one stage to the next
• Three CV outputs derived from combinations of gate outputs
• Internal clock oscillator with rate control